Wafer-Level Testing and Test During Burn-In for Integrated Circuits

Author:   Sudarshan Bahukudumbi ,  Krishnendu Chakrabarty
Publisher:   Artech House Publishers
Edition:   Unabridged edition
ISBN:  

9781596939899


Pages:   210
Publication Date:   28 February 2010
Format:   Hardback
Availability:   In Print   Availability explained
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Wafer-Level Testing and Test During Burn-In for Integrated Circuits


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Overview

Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing. Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constraints. Moreover, this unique book helps practitioners address the issue of enabling next generation products with previous generation testers. Practitioners also find expert insights on current industry trends in WLTBI test solutions.

Full Product Details

Author:   Sudarshan Bahukudumbi ,  Krishnendu Chakrabarty
Publisher:   Artech House Publishers
Imprint:   Artech House Publishers
Edition:   Unabridged edition
Dimensions:   Width: 15.70cm , Height: 1.80cm , Length: 23.10cm
Weight:   0.431kg
ISBN:  

9781596939899


ISBN 10:   1596939893
Pages:   210
Publication Date:   28 February 2010
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

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