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OverviewFull Product DetailsAuthor: Keshab K. ParhiPublisher: John Wiley & Sons Inc Imprint: John Wiley & Sons Inc Edition: 2nd Revised edition ISBN: 9781118128534ISBN 10: 1118128532 Pages: 720 Publication Date: 21 September 2012 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Not yet available  This item is yet to be released. You can pre-order this item and we will dispatch it to you upon its release. Table of ContentsPreface xv 1 Introduction to Digital Signal Processing Systems 1 2 Iteration Bound 43 3 Pipelining and Parallel Processing 63 4 Retiming 91 5 Unfolding 119 6 Folding 149 7 Systolic Architecture Design 189 8 Fast Convolution 227 9 Algorithmic Strength Reduction in Filters and Transforms 255 10 Pipelined and Parallel Recursive and Adaptive Filters 313 11 Scaling and Roundoff Noise 377 12 Digital Lattice Filter Structures 421 13 Bit-Level Arithmetic Architectures 477 14 Redundant Arithmetic 529 15 Numerical Strength Reduction 559 16 Synchronous, Wave, and Asynchronous Pipelines 591 17 Low-Power Design 645 18 Programmable Digital Signal Processors 695 Appendix A: Shortest Path Algorithms 717 Appendix B: Scheduling and Allocation Technique 723 Appendix C: Euclidean GCD Algorithm 743 Appendix D: Orthonormality of Schur Polynomials 747 Appendix E: Fast binary Adders and Multipliers 753 Appendix F: Scheduling in Bit-Serial Systems 763 Appendix G: Coefficient Quantization in FIR Filters 771 Index 775 ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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