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OverviewThis text discusses the introduction of innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance Very Long Instruction Word (VLIW) microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations; this set of operations is statically scheduled to form a Very Long Instruction Word. The proposed estimation techniques are integrated into a set of tools operating at the instruction level and they are characterized by efficiency and accuracy. The aim is the definition of an overall power estimation framework, from a system-level perspective, where novel power optimization techniques can be evaluated. The proposed power optimization techniques are addressed to the micro-architectural as well as the system level. Two main optimization techniques have been proposed: the definition of register file write inhibition schemes that exploit the forwarding paths, and the definition of a design exploration framework for an efficient fine-tuning of the configurable modules of an embedded system. Full Product DetailsAuthor: Vittorio Zaccaria , M.G. Sami , Donatella Sciuto , Cristina SilvanoPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2003 ed. Dimensions: Width: 16.00cm , Height: 1.50cm , Length: 24.00cm Weight: 0.544kg ISBN: 9781402073779ISBN 10: 1402073771 Pages: 203 Publication Date: 28 February 2003 Audience: College/higher education , Professional and scholarly , Undergraduate , Postgraduate, Research & Scholarly Format: Hardback Publisher's Status: Active Availability: Out of stock  The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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