Overview

Teaching fundamental design concepts and the challenges of emerging technology, this textbook prepares students for a career designing the computer systems of the future. Self-contained yet concise, the material can be taught in a single semester, making it perfect for use in senior undergraduate and graduate computer architecture courses. This edition has a more streamlined structure, with the reliability and other technology background sections now included in the appendix. New material includes a chapter on GPUs, providing a comprehensive overview of their microarchitectures; sections focusing on new memory technologies and memory interfaces, which are key to unlocking the potential of parallel computing systems; deeper coverage of memory hierarchies including DRAM architectures, compression in memory hierarchies and an up-to-date coverage of prefetching. Practical examples demonstrate concrete applications of definitions, while the simple models and codes used throughout ensure the material is accessible to a broad range of computer engineering/science students.

Full Product Details

9781009447591

Table of Contents

Reviews

'Parallel computers and multi-core architectures are rapidly gaining importance because the performance of a single core is not improving at the same historical level. Professors Dubois, Annavaram, and Stenström have created an easily readable book on the intricacies of parallel architecture design that academicians and practitioners alike will find extremely useful.' Shubu Mukherjee, Vice President, Architecture, SiFive 'The book can help readers to understand the principles of parallel systems in a crystally clear way. A necessary book to read for the designers of parallel systems.' Yunji Chen, Institute of Computing Technology, Chinese Academy of Sciences 'All future electronic systems will comprise of a built-in microprocessor, consequently the importance of computer architecture will surge. This book provides an excellent tutorial of computer architecture fundamentals, from the basic technology via processor and memory architecture to chip multiprocessors. I found the book to flow in an educational and readable way - an excellent instructive book worth using.' Uri Weiser, Technion '… parallel architectures are the key for high-performance and high-efficiency computing systems. This book tells the story of parallel architecture at all levels - from the single transistor to the full-blown CMP - an unforgettable journey!' Ronny Ronen, Technion 'This s the best of today's books on the subject, and I used [the previous edition] in my class. It is an up-to-date picture of parallel computing that is written in a style that is clear and accessible.' Trevor Mudge, Bredt Family Professor Emeritus of Computer Science and Engineering, University of Michigan 'This text takes a fresh cut at traditional computer architecture topics and considers basic principles from the perspective of multi-core and parallel systems. Such a high-quality textbook written from this perspective is overdue, and the authors of this text have done a good job in organizing and revamping topics to provide the next generation of computer architects with the basic principles they will need to design multi-core and many-core systems.' David Kaeli, Director of the NU Computer Architecture Research Laboratory, NEU

Author Information

Michel Dubois (1953-2022) was Professor Emeritus of Electrical and Computer Engineering at the University of Southern California (USC). Before joining USC in 1984, he was a research engineer at the Central Research Laboratory of Thomson-CSF in Orsay, France. He published more than 150 technical papers on computer architecture, as well as three book chapters and three books. Murali Annavaram is the Lloyd Hunt Chair Professor in the Ming-Hsieh Department of Electrical and Computer Engineering and in the Thomas Lord department of Computer Science (joint appointment) at the University of Southern California. He is the founding director of the REAL@USC-Meta center that is focused on research and education in AI and learning. He is a Fellow of IEEE and Distinguished Member of ACM. Per Stenström is Professor at Chalmers University of Technology. His research interests are in parallel computer architecture. He has authored or co-authored four textbooks, about 200 publications and twenty patents in this area. He is a Fellow of the ACM and the IEEE and a member of Academia Europaea and the Royal Swedish Academy of Engineering Sciences. He was the 2021 recipient of ACM SIGARCH Alan Berenbaum Distinguished Service Award.

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