Low-Noise Low-Power Design for Phase-Locked Loops: Multi-Phase High-Performance Oscillators

Author:   Feng Zhao ,  Fa Foster Dai
Publisher:   Springer International Publishing AG
Edition:   Softcover reprint of the original 1st ed. 2015
ISBN:  

9783319343709


Pages:   96
Publication Date:   23 August 2016
Format:   Paperback
Availability:   Manufactured on demand   Availability explained
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Low-Noise Low-Power Design for Phase-Locked Loops: Multi-Phase High-Performance Oscillators


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Overview

This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation.  The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage.  Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.  

Full Product Details

Author:   Feng Zhao ,  Fa Foster Dai
Publisher:   Springer International Publishing AG
Imprint:   Springer International Publishing AG
Edition:   Softcover reprint of the original 1st ed. 2015
Dimensions:   Width: 15.50cm , Height: 0.60cm , Length: 23.50cm
Weight:   1.825kg
ISBN:  

9783319343709


ISBN 10:   331934370
Pages:   96
Publication Date:   23 August 2016
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   Manufactured on demand   Availability explained
We will order this item for you from a manufactured on demand supplier.

Table of Contents

Introduction.- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL.- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar.- Design and Analysis of QVCO with Different Coupling Techniques.- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique.- Conclusions.

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Author Information

"This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters. Provides detailed introduction to noise reduction techniques for fractional-N phase-locked loop systems;Analyzes the nonlinear effect and its impact on fractional-N phase-locked loop systems;Describes a wide-band integer-N PLL and bandgap reference design for X-band radar application;Explains details of capacitive-coupling techniques for robust quadrature voltage-controlled oscillator (VCO) designs and multi-phase clock generation;Presents basic simulation techniques for quadrature VCO to guarantee robust design."""

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