Overview

This textbook aims to provide learners with an understanding of embedded systems built around Arm Cortex-M processor cores, a popular CPU architecture often used in modern low-power SoCs that target IoT applications. Readers will be introduced to the basic principles of an embedded system from a high-level hardware and software perspective and will then be taken through the fundamentals of microcontroller architectures and SoC-based designs. Along the way, key topics such as chip design, the features and benefits of Arm's Cortex-M processor architectures (including TrustZone, CMSIS and AMBA), interconnects, peripherals and memory management are discussed. The material covered in this book can be considered as key background for any student intending to major in computer engineering and is suitable for use in an undergraduate course on digital design.

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9781911531333

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Ren� Beuchat has been an associate Professor at HEPIA - the Geneva School of Engineering, Architecture and Landscape - since 1987 and has worked at EPFL - the Swiss Federal Institute of Technology in Lausanne - since 1981 after receiving his BSc and MSc from both schools. Teaching has been a big part of his work throughout the years. Ren� is a firm believer that cutting-edge technology can only be taught with personal experience and, as a result, participated in many research projects and collaborations with dozens of companies and universities. He has also supervised a few hundred student research projects, mainly through industrial collaborations in the field of embedded systems, networking, and FPGAs. Andrea Guerrieri is a senior research engineer and lecturer with more than 15 years of experience. He received his MSc degrees in Electronic Engineering from Politecnico di Torino, and is now part of the Processor Architecture Laboratory at EPFL, where he leads and participates in cutting-edge research projects adopting FPGAs for future space missions, exoplanet observation, and post-quantum cryptography for nanosatellites Sahand Kashani received his Master's in computer engineering from EPFL in 2017. He is currently a PhD candidate in the School of Computer and Communication Sciences at EPFL. His research focuses on rethinking the traditional FPGA compiler flow to improve hardware design productivity for modern compute-intensive FPGA workloads. Sahand is a former student of Ren�'s and has been working with FPGAs for over seven years. He is an avid systems geek and enjoys transmitting his passion for digital design and reconfigurable computing to students.

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