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OverviewVLSI, or Very-Large-Scale-Integration, is the practice of combining billions of transistors to create an integrated circuit. At present, VLSI circuits are realised using CMOS technology. However, the demand for ever smaller, more efficient circuits is now pushing the limits of CMOS. Post-CMOS refers to the possible future digital logic technologies beyond the CMOS scaling limits. This 2-volume set addresses the current state of the art in VLSI technologies and presents potential options for post-CMOS processes. VLSI and Post-CMOS Electronics is a useful reference guide for researchers, engineers and advanced students working in the area of design and modelling of VLSI and post-CMOS devices and their circuits. Volume 1 focuses on design, modelling and simulation, including applications in low voltage and low power VLSI, and post-CMOS devices and circuits. Volume 2 addresses a wide range of devices, circuits and interconnects. Full Product DetailsAuthor: Rohit Dhiman (Assistant Professor, NIT Hamirpur, Electronics & Communication Engineering Department, India) , Rajeevan Chandel (Professor, National Institute of Technology (NIT) Hamirpur, India)Publisher: Institution of Engineering and Technology Imprint: Institution of Engineering and Technology ISBN: 9781839530555ISBN 10: 1839530553 Pages: 776 Audience: College/higher education , Professional and scholarly , Tertiary & Higher Education , Professional & Vocational Format: Mixed media product Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsVolume 1 Section I: Low voltage and low power VLSI design Chapter 1: Low-voltage analog signal processing Chapter 2: Negative bias temperature instability (NBTI) aware low leakage circuit design Chapter 3: Low-voltage, low-power SRAM circuits using subthreshold design technique Chapter 4: Design and analysis of memristor-based DRAM cell for low-power application Chapter 5: Design of a novel tunnel FET for low-power applications Chapter 6: Composite PFD based low-power, low noise, fast lock-in PLL Section II: Modelling and simulation for post-CMOS device and circuit design Chapter 7: Emerging devices beyond CMOS: fundamentals, promises and challenges Chapter 8: Two-dimensional material-based field-effect transistors for post-silicon electronics Chapter 9: Theory and modelling of spin-transfer-torque based electronic devices Chapter 10: Spintronics memory and logic: an efficient alternative to CMOS technology Chapter 11: Tunneling field effect transistors for energy efficient digital, RF and power management circuit designs enabling IoT edge computing platforms Chapter 12: High performing metal-oxide semiconductor thin-film transistors Chapter 13: CNTFETs: modelling and circuit design Volume 2 Section I: High-performance compound semiconductor devices and applications Chapter 1: III-V compound semiconductor transistors - from planar to nanowire structures Chapter 2: UTB III-V-OI-Si MOS transistor: the future transistor for VLSI design Chapter 3: Assessment of SiGe/Si heterojunction tunnel field-effect transistor for digital VLSI circuit applications Chapter 4: Simulation framework for GaN devices with special mention to reliability concern Section II: Process variability in FinFETs: challenges and mitigation Chapter 5: Impact of oxide thickness variation on the performance of junctionless FinFET Chapter 6: Design and analysis of variability aware FinFET-based SRAM circuit design Section III: Through silicon via interconnects for three-dimensional integration Chapter 7: Modelling interconnects for future VLSI circuit applications Chapter 8: Nanomagnetic computing for next generation interconnects and logic design Chapter 9: Prospective current mode approach for on-chip interconnects in integrated circuit designs Chapter 10: Design of through silicon vias for improved performance in 3D IC applications Chapter 11: Prospective graphene-based through silicon vias in three-dimensional integrated circuits Section IV: Emerging technologies for integrated circuits Chapter 12: Radiation hard circuit design: flip-flop and SRAM Chapter 13: Phase change memory: electrical circuit modelling, nanocrossbar performance analysis and applications Chapter 14: Methods to design ternary gates and adders Chapter 15: Single EXCCII based square/triangular wave generator for capacitive sensor interfacing and brief review Chapter 16: Transient fault secured/tolerant architecture for DSP coreReviewsAuthor InformationRohit Dhiman is an Assistant Professor in the Electronics & Communication Engineering Department at NIT Hamirpur, India, and is the author/co-author of over 30 publications in international journals and conference proceedings. His main research interest is in device and circuit modelling for low power VLSI design. Rajeevan Chandel is Professor in the Electronics & Communication Engineering Department and Dean (Research & Consultancy) at the National Institute of Technology (NIT) Hamirpur, India. She has over 150 research papers in peer reviewed international journals and conferences. Her research interests are electronics circuit modelling and low power VLSI design. Tab Content 6Author Website:Countries AvailableAll regions |
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