Overview

This third edition has been revised and updated in accordance with the IEEE 1364-2001 standard, much of which applies to synthesizable Verilog.; Verilog evolves not only through updated standards, but also through improvements in methodologies, coding styles and tools. This brings a reader up to date with the standards in coding practices and introduces methodology used on many of today's cutting-edge designs. This book explores many aspects of Verilog including: state machine style for high-speed glitch-free outputs; simple techniques for effective test cycles. Code coverage is introduced and the interaction of coding style and code coverage is explored. This book is designed to teach the Verilog language, to show the designer how to model in Verilog and to explain the basics of using Verilog simulators. This book is a basic, practical, introductory textbook for professionals and students alike. It explains how a designer can be more effective through the use of Verilog Hardware Description Language to simulate and document a design. The attached CD-ROM includes the Silos III simulator with many of the 2001 language features and over 100 runable examples from the book.

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9781280206368

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