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OverviewVerification isjob one in today's modem design process. Statistics tell us that the verification process takes up a majority of the overall work. Chips that come back dead on arrival scream that verification is at fault for not finding the mistakes. How do we ensure success? After an accomplishment, have you ever had someone ask you, ""Are you good or are you just lucky?""? Many design projects depend on blind luck in hopes that the chip will work. Other's, just adamantly rely on their own abilities to bring the chip to success. ill either case, how can we tell the difference between being good or lucky? There must be a better way not to fail. Failure. No one likes to fail. ill his book, ""The Logic of Failure"", Dietrich Domer argues that failure does not just happen. A series of wayward steps leads to disaster. Often these wayward steps are not really logical, decisive steps, but more like default omissions. Anti-planning if you will, an ad-hoc approach to doing something. To not plan then, is to fail. Full Product DetailsAuthor: Peet JamesPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2004 ed. Dimensions: Width: 15.50cm , Height: 1.30cm , Length: 23.50cm Weight: 0.397kg ISBN: 9781461350941ISBN 10: 1461350948 Pages: 229 Publication Date: 05 November 2012 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of Contents1 Plan, Plan, Plan.- Verification.- General Specifications.- Transposition.- Verification Systems.- Why Have A Plan.- The Plan.- 2 Shotgun Verification.- HDL vs HVL.- Schematics to Hdl.- HDL to HVL.- HVL Plan.- HVL Gone Bad.- HVL Benefits.- The New Midset: Shotguns and Peashooters.- Three Enabling Verification Methodologies.- Bottomline.- 3 Getting Started.- Preliminaries: Greasing the Skids.- The When.- The Who: Verification Team.- Day One: Brain Dump, Brain Fill.- Final Thought.- 4 Day in the Life.- DITL.- Resistance.- Verification and DITL.- Day Two: Getting started.- Day Two: DITL.- Day Two: Verification System Architect.- Day Two: Generation.- Day Two: To Do List, stuff to talk about, questions to ask.- Day Two: Extras.- Day Two: Gotchas.- Day Two: Assignments.- Final Thought.- Chapters 5 Layers and Phases.- Introduction:.- Verification Components.- Existing Code.- Layers and Phases: An Introduction.- Day Three: Getting Started.- Day Three: Layers.- Day Three: Phases.- Day Three: Integrating Layers and Phases.- Day Three: Results.- Day Three: To Do List, stuff to talk about, questions to ask.- Day Three: Extras.- Day Three: Gotchas.- Day Three: Assignments.- Final Thought.- 6 Format.- Audience.- Goal, Purpose, And Flow.- Size and Breakout Documents.- Entry Tools.- Charts and Graphs.- Final Thoughts.- Chapter7 Information Extraction.- Philosophy.- The Nature of Prediction.- Talking Heads and Silent Types.- Structure in Chaos.- Reverse osmosis.- Paradoxical Solutions.- Gut vs fuzzy.- Spiral convergence.- Yellow-Sticky Method.- Final Thoughts.- 8 Breakout Documents.- Day Four, Day Five, And Beyond.- System Admin Breakout Document Content.- System Admin Breakout Document Summary.- Checkers Breakout Document Content.- Checkers Breakout Document Summary.- Scoreboards Breakout Document Content.- Scoreboards Breakout Document Summary.- Functional coverage breakout document content.- Functional Coverage Breakout Document Summary.- SEQ and Scenarios Breakout Document Content.- SEQ and Scenarios Breakout Document Summary.- Schedule Breakout Document Content.- Schedule Plan Breakout Document Summary.- Other Documents.- Final Thoughts.- 9 Wrap Up.- What about the Features?.- When to use directed?.- Are there other 5-Day Paths that Yield Success?.- Where do I get a Soft Copy?.- Was this Book Plug to get Consulting Gigs?.- Is it Ok to use other Formats?.- Why do you spell your Name Wrong?.- Contact Information.- Appendix Intro.- Appendix A Day in the Life Document Examples.- A1: Usbnode.- A2: Coolswitch.- Appendix B Main Plan Document Usbnode Example.- Appendix C Breakout Document Examples.- C1: System administration.- C2: CHECKER Document.- C3: scoreboard Document.- C4: Coverage Document.- C5: Scenario and Sequence Document.- C6: Schedule spreadsheet example.- Appendix D Original Five Day Paper.Reviews"""In this book, Peet gives every engineer trying to do functional verification a jump-start on getting it under control...His technique...is soundly grounded in the real world, honed through years of experience and practice. If you adopt this approach, it will improve the speed with which verification plans are produced, improve their quality, help eliminate redundant work, and reduce unnecessary work...But wait, there's more. Peet not only tells you how to do it, he tells you why you should do it a certain way, and why Hardware Verification Languages give you an advantage (motivation for you to check out the new techniques and ammunition for your presentations to management)...I have been helped already by what Peet gives in his book. I'm keeping my copy right next to Janick's book."" (Glenn Hunt, Texas Instruments)" In this book, Peet gives every engineer trying to do functional verification a jump-start on getting it under control...His technique...is soundly grounded in the real world, honed through years of experience and practice. If you adopt this approach, it will improve the speed with which verification plans are produced, improve their quality, help eliminate redundant work, and reduce unnecessary work...But wait, there's more. Peet not only tells you how to do it, he tells you why you should do it a certain way, and why Hardware Verification Languages give you an advantage (motivation for you to check out the new techniques and ammunition for your presentations to management)...I have been helped already by what Peet gives in his book. I'm keeping my copy right next to Janick's book. (Glenn Hunt, Texas Instruments) In this book, Peet gives every engineer trying to do functional verification a jump-start on getting it under control...His technique...is soundly grounded in the real world, honed through years of experience and practice. If you adopt this approach, it will improve the speed with which verification plans are produced, improve their quality, help eliminate redundant work, and reduce unnecessary work...But wait, there's more. Peet not only tells you how to do it, he tells you why you should do it a certain way, and why Hardware Verification Languages give you an advantage (motivation for you to check out the new techniques and ammunition for your presentations to management)...I have been helped already by what Peet gives in his book. I'm keeping my copy right next to Janick's book. (Glenn Hunt, Texas Instruments) Author InformationTab Content 6Author Website:Countries AvailableAll regions |
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