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OverviewThis book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Full Product DetailsAuthor: Ethiopia Enideg NigussiePublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Dimensions: Width: 15.50cm , Height: 1.30cm , Length: 23.50cm Weight: 0.291kg ISBN: 9781489990860ISBN 10: 1489990860 Pages: 172 Publication Date: 03 March 2014 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsReviewsAuthor InformationIntroduction.- Interconnect Design Techniques.- On-Chip Wire Modeling.- Design of Delay-Insensitive Current Sensing Interconnects.- Enhancing Completion Detection Performance.- Energy Efficient Semi-Serial Interconnect.- Comparison of the Designed Interconnects.- Circuit Techniques for PVT Variation Tolerance. Tab Content 6Author Website:Countries AvailableAll regions |
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