Transient and Permanent Error Control for Networks-on-Chip

Author:   Qiaoyan Yu ,  Paul Ampadu
Publisher:   Springer-Verlag New York Inc.
Edition:   2012
ISBN:  

9781461409618


Pages:   160
Publication Date:   17 November 2011
Format:   Hardback
Availability:   Awaiting stock   Availability explained
The supplier is currently out of stock of this item. It will be ordered for you and placed on backorder. Once it does come back in stock, we will ship it out for you.

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Transient and Permanent Error Control for Networks-on-Chip


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Overview

This book addresses reliability and energy efficiency of on-chip networks using cooperative error control. It describes an efficient way to construct an adaptive error control codec capable of tracking noise conditions and adjusting the error correction strength at runtime. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.

Full Product Details

Author:   Qiaoyan Yu ,  Paul Ampadu
Publisher:   Springer-Verlag New York Inc.
Imprint:   Springer-Verlag New York Inc.
Edition:   2012
Dimensions:   Width: 15.50cm , Height: 1.10cm , Length: 23.50cm
Weight:   0.430kg
ISBN:  

9781461409618


ISBN 10:   1461409616
Pages:   160
Publication Date:   17 November 2011
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   Awaiting stock   Availability explained
The supplier is currently out of stock of this item. It will be ordered for you and placed on backorder. Once it does come back in stock, we will ship it out for you.

Table of Contents

Introduction.- Existing Transient and Permanent Error Management in NoCs.- Adaptive Error Control Coding at Datalink Layer.- Transient and Permanent Link Errors Co-Management.- Dual-Layer Cooperative Error Control for Transient Error.- A Flexible Parallel Simulator for Networks-on-Chip with Error Control.- Conclusions and Future Directions. 

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