Timing Verification of Application-Specific Integrated Circuits (ASICs)

Author:   Farzad Nekoogar
Publisher:   Pearson Education (US)
ISBN:  

9780137943487


Pages:   208
Publication Date:   26 July 1999
Format:   Hardback
Availability:   Out of stock   Availability explained


Our Price $266.64 Quantity:  
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Timing Verification of Application-Specific Integrated Circuits (ASICs)


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Overview

79434-7 It's About Time In today's high-speed designs, timing analysis is critical to success. This is the first book to focus exclusively on these crucial timing issues, with special emphasis on timing verification of ASICs. Timing Verification of Application Specific Integrated Circuits (ASICs) highlights principles and techniques over specific tools. This method makes the materials applicable to a variety of logic design approaches, especially in the field of deep submicron digital design. Topics include: Clock definitions, multicycle paths, false paths, and phase-locked loops Behavioral and structural RTL coding for timing Timing analysis of FPGAs Pre and Post layout timing analysis Synthesis and Timing constraints EDA timing tools Numerous design examples and Verilog codes offer practical illustrations of all the concepts. Timing Verification of Application Specific Integrated Circuits (ASICs) is a must for all logic designers concerned with the accuracy of timing and clock issues.

Full Product Details

Author:   Farzad Nekoogar
Publisher:   Pearson Education (US)
Imprint:   Prentice Hall
Dimensions:   Width: 24.30cm , Height: 2.00cm , Length: 18.40cm
Weight:   0.336kg
ISBN:  

9780137943487


ISBN 10:   0137943482
Pages:   208
Publication Date:   26 July 1999
Audience:   College/higher education ,  Tertiary & Higher Education
Format:   Hardback
Publisher's Status:   Out of Print
Availability:   Out of stock   Availability explained

Table of Contents

1. Introduction to Timing Verification. Introduction. Overview of Timing Verification. Interface Timing Analysis. 2. Elements of Timing Verification. Introduction. Clock Definitions. More on STA. Timing Analysis of Phase-Locked Loops. 3. Timing in ASICs. Introduction. Prelayout Timing. Postlayout Timing. ASIC Sign-Off Checklist. 4. Programmable Logic Based Design. Introduction. Programmable Logic Structures. Design Flow. Timing Parameters. Timing Analysis. HDL Synthesis. Software Development Systems. A. PrimeTime. B. Pearl. C. TimingDesigner. D. Transistor-Level Timing Verification. References. Index. About the Author

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Author Information

"FARZAD NEKOOGAR, formerly a Technical Manager at Intrinsix Corp., has extensive practical experience verifying timing of ASICs, FPGAs, and systems-on-a-chip. He is a lecturer at the University of California at Davis, and is the author of ""Digital Control Using Digital Signal Processing, "" published by Prentice Hall PTR."

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