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OverviewThis book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment. Full Product DetailsAuthor: Ivan S Kourtev , Baris Taskin , Eby G FriedmanPublisher: Springer Imprint: Springer Dimensions: Width: 23.40cm , Height: 1.50cm , Length: 15.60cm Weight: 0.399kg ISBN: 9780387565484ISBN 10: 0387565485 Pages: 284 Publication Date: 23 February 2009 Audience: General/trade , General Format: Undefined Publisher's Status: Unknown Availability: Out of stock  Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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