Overview

This work focuses on optimizing the timing of large-scale, high-performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This research monograph answers the need for a broad introduction to state-of-the-art clock skew scheduling algorithms from a circuit, graph, and mathematical optimization background. A detailed description of an original quadratic programming (QP) formulation of the clock skew scheduling problem is provided along with an analysis of optimal computer solution techniques. It contains sufficient detail for the advanced CAD algorithm developer, researcher and graduate student. Furthermore, with the material provided on timing properties and optimization, those readers with less background should also benefit from this book.

Full Product Details

Author:   Ivan S. Kourtev ,  Eby G. Friedman ,  Baris Taskin
Publisher:   Springer
Imprint:   Springer
Edition:   2000 ed.
Dimensions:   Width: 15.50cm , Height: 1.40cm , Length: 23.50cm
Weight:   1.080kg
ISBN:  

9780792377962

ISBN 10:   0792377966
Pages:   194
Publication Date:   31 March 2000
Audience:   College/higher education ,  Professional and scholarly ,  Undergraduate ,  Postgraduate, Research & Scholarly
Format:   Hardback
Publisher's Status:   Active
Availability:   In Print  
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Table of Contents

1. Introduction.- 2. VLSI Systems.- 2.1 Signal Representation.- 2.2 Synchronous VLSI Systems.- 2.3 The VLSI Design Process.- 2.4 Summary.- 3. Signal Delay In Vlsi Systems.- 3.1 Delay Metrics.- 3.2 Devices and Interconnections.- 4. Timing Properties Of Synchronous Systems.- 4.1 Storage Elements.- 4.2 Latches.- 4.3 Parameters of Latches.- 4.4 Flip-Flops.- 4.5 Parameters of Flip-Flops.- 4.6 The Clock Signal.- 4.7 Single-Phase Path with Flip-Flops.- 4.8 Single-Phase Path with Latches.- 4.9 A Final Note.- 5. Clock Scheduling and Clock Tree Synthesis.- 5.1 Background.- 5.2 Definitions and Graphical Model.- 5.3 Clock Scheduling.- 5.4 Structure of the Clock Distribution Network.- 5.5 Solution of the Clock Tree Synthesis Problem.- 5.6 Software Implementation.- 6. Clock Scheduling For Improved Reliability.- 6.1 Problem Formulation.- 6.2 Derivation of the QP Algorithm.- 7. Practical Considerations.- 7.1 Computational Analysis.- 7.2 Unconstrained Basis Skews.- 7.3 I/O Registers and Target Delays.- 8. Experimental Results.- 8.1 Description of Computer Implementation.- 8.2 Graphical Illustrations of Results.- 9. Conclusions.- 10. Future Directions.- 10.1 Algorithmic Enhancements.- 10.2 Practical Considerations.- References.- Appendices.- A- Numerical Illustration of Algorithms.- A.1 Algorithm LMCS-1.- A.2 Algorithm LMCS-2.- A.3 Algorithm CSD.- B- Glossary of Terms.- C- Graphical Illustration of Results.- About the Authors.

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