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OverviewRecent advances in semiconductor technology offer vertical interconnect access (via) that extend through silicon, popularly known as through silicon via (TSV). This book provides a comprehensive review of the theory behind TSVs while covering most recent advancements in materials, models and designs. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for Cu, carbon nanotube (CNT) and graphene nanoribbon (GNR) based TSVs are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR based TSVs are also discussed. Full Product DetailsAuthor: Brajesh Kumar Kaushik , Vobulapuram Ramesh Kumar , Manoj Kumar Majumder , Arsalan AlamPublisher: Taylor & Francis Ltd Imprint: CRC Press Weight: 0.430kg ISBN: 9780367574543ISBN 10: 0367574543 Pages: 216 Publication Date: 30 June 2020 Audience: Professional and scholarly , College/higher education , Professional & Vocational , Tertiary & Higher Education Format: Paperback Publisher's Status: Active Availability: In Print This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsReviewsAuthor InformationBrajesh Kumar Kaushik received his Doctorate of Philosophy (PhD) in 2007 from Indian Institute of Technology Roorkee, India. He served Vinytics Peripherals Pvt. Ltd., Delhi, as a Research and Development engineer in microprocessor, microcontroller, and DSP processor-based system design. He joined Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has extensively published in several national and international journals and conferences. He is a reviewer of many international journals belonging to various organizations and publishers including IEEE, IET, Elsevier, Springer, Taylor & Francis, Emerald, ETRI, and PIER. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is Senior Member of IEEE and member of many expert committees constituted by government and nongovernment organizations. He holds the position of Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics. He is Editor-in-Chief of International Journal of VLSI Design & Communication Systems (VLSICS), AIRCC Publishing Corporation. He also holds the position of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal of Engineering, Design and Technology (JEDT), Emerald Group Publishing Limited; and Journal of Electrical and Electronics Engineering Research (JEEER), Academic Journals. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who’s Who in Science and Engineering® and Marquis Who’s Who in the World®. His research interests are in the areas of high-speed interconnects, low-power VLSI design, carbon nanotube-based designs, organic electronics. FinFET device circuit co-design, electronic design automation (EDA), and spintronics-based devices and circuits. Tab Content 6Author Website:Countries AvailableAll regions |