Overview

The latest cost- and space-saving methods of 3D integrated circuits

Through-Silicon Vias (TSVs) for 3D Integration covers cutting-edge developments in 3D ICs-essential for the development of low-cost, high-performance electronic and optoelectronic products. The book proposes that every chip or interposer could have two surfaces with circuits.

This detailed guide discusses TSV manufacturing yield and hidden costs and includes characterization and reliability data for 3D IC integration. The in-depth information in the book provides context for choosing robust, reliable, high-performance, cost-effective packaging and 3D IC/Si integration techniques for high-density electronic products.

Through-Silicon Vias (TSVs) for 3D Integration Emphasizes the key enabling technologies for 3D IC integrations: Designs and testsKnown-good die (KGD) testing methodsTSV forming and fillingWafer thinning and handlingThin chip/wafer strength measurement and improvingLead-free microbumping and assemblyLow temperature C2C, C2W, and W2W bondingThermal managementPresents applications of 3D IC integration: CMOS image sensorMEMSLEDWide I/OMemory + logicLogic + logicMemory + microprocessorActive and passive interposers

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9786613831590

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