Overview

This volume presents the proceedings of the Second International Conference on Theorem Provers in Circuit Design (TPCD '94) jointly organized by the Forschungszentrum Informatik (University of Karlsruhe) and IFIP Working Group 10. 2 in Bad Herrenalb, Germany in September 1994. The 19 papers included are thoroughly revised versions of the submissions selected for presentation at the conference and address all current aspects of theorem provers in circuit design. Particular emphasis is given to benchmark-circuits for hardware verification; tutorials on two popular theorem provers are included.

Full Product Details

Author:   Ramayya Kumar ,  Thomas Kropf
Publisher:   Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
Imprint:   Springer-Verlag Berlin and Heidelberg GmbH & Co. K
Edition:   1995 ed.
Volume:   901
Dimensions:   Width: 15.50cm , Height: 1.70cm , Length: 23.30cm
Weight:   1.010kg
ISBN:  

9783540590477

ISBN 10:   3540590471
Pages:   312
Publication Date:   06 March 1995
Audience:   College/higher education ,  Professional and scholarly ,  Postgraduate, Research & Scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   In Print  
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Table of Contents

Benchmark-circuits for hardware-verification.- Reasoning about pipelines with structural hazards.- A correctness model for pipelined microprocessors.- Non-restoring integer square root: A case study in design by principled optimization.- An automatic generalization method for the inductive proof of replicated and parallel architectures.- A compositional circuit model and verification by composition.- Exploiting structural similarities in a BDD-based verification method.- Studies of the single pulser in various reasoning systems.- Mechanized verification of speed-independence.- Automatic correctness proof of the implementation of synchronous sequential circuits using an algebraic approach.- Mechanized verification of refinement.- Effective theorem proving for hardware verification.- A formal framework for high level synthesis.- Tutorial on design verification with synchronized transitions.- A tutorial on using PVS for hardware verification.- A reduced instruction set proof environment.- Quantitative evaluation of formal based synthesis in ASIC design.- Formal verification of characteristic properties.- Extending formal reasoning with support for hardware diagrams.

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