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Overviewxv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("" Full Product DetailsAuthor: Donald E. Thomas , Philip R. MoorbyPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 5th ed. 2002. Softcover reprint of the original 5th ed. 2002 Dimensions: Width: 15.50cm , Height: 2.10cm , Length: 23.50cm Weight: 0.623kg ISBN: 9781475775891ISBN 10: 147577589 Pages: 382 Publication Date: 15 February 2014 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsVerilog — A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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