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OverviewEmbedded memories are one of the fastest growing segments of today's new technology market. According to the 2001 International Technology Roadmap for Semiconductors, embedded memories will continue to dominate the increasing system on chip (SoC) content in the next several years, approaching 94 per cent of the SoC area in about 10 years. Furthermore, the shrinking size of manufacturing structures makes memories more sensitive to defects. Consequently, the memory yield will have a dramatic impact on the overall Defect-per-million level, hence on the overall SoC yield. Meeting a high memory yield requires understanding memory designs, modeling their faulty behaviors, designing adequate tests and diagnosis algorithms as well as efficient self-test and repair schemes. Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it address testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic faul Full Product DetailsAuthor: Said HamdiouiPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2004 ed. Volume: 26 Dimensions: Width: 15.50cm , Height: 1.40cm , Length: 23.50cm Weight: 1.150kg ISBN: 9781402077524ISBN 10: 1402077521 Pages: 221 Publication Date: 31 March 2004 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Out of print, replaced by POD We will order this item for you from a manufatured on demand supplier. Table of ContentsI Introductory.- 1 Introduction.- 2 Semiconductor memory architecture.- 3 Space of memory faults.- 4 Preparation for circuit simulation.- II Testing single-port and two-port SRAMs.- 5 Experimental analysis of two-port SRAMs.- 6 Tests for single-port and two-port SRAMs.- 7 Testing restricted two-port SRAMs.- III Testing p-port SRAMs.- 8 Experimental analysis of p-port SRAMs.- 9 Tests for p-port SRAMs.- 10 Testing restricted p-port SRAMs.- 11 Trends in embedded memory testing.- A Simulation results for two-port SRAMs.- A.1 Simulation results for opens.- A.2 Simulation results for shorts.- A.3 Simulation results for bridges.- B Simulation results for three-port SRAMs.- B.1 Simulation results for opens and shorts.- B.2 Simulation results for bridges.ReviewsFrom the reviews: <p> Static random access memories (SRAMs) enjoy a strategic position in the microelectronic industry. a ] This book concentrates on the study of fault modeling, testing and test strategies for SRAMs. a ] The book provides a well-written coverage in the area of single-, two- and n-port SRAM testing, fault modeling, and simulation. It is well-organized and very timely. a ] The book promises to make valuable contribution to the education of graduate students a ] . I highly recommend this book a ] . (Mile Stojcev, Microelectronics Reliability, Vol. 45, 2005) From the reviews: Static random access memories (SRAMs) enjoy a strategic position in the microelectronic industry. ! This book concentrates on the study of fault modeling, testing and test strategies for SRAMs. ! The book provides a well-written coverage in the area of single-, two- and n-port SRAM testing, fault modeling, and simulation. It is well-organized and very timely. ! The book promises to make valuable contribution to the education of graduate students ! . I highly recommend this book ! . (Mile Stojcev, Microelectronics Reliability, Vol. 45, 2005) Author InformationTab Content 6Author Website:Countries AvailableAll regions |