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OverviewThis volume deals with the study of fault modelling, testing and testable design of semiconductor random-access memories. It is written primarily for the practising design engineer and the manufacturer of random-access memories (RAMs) of the modern age. The book presents an integrated approach to state-of-the-art testing and testable design techniques for RAMs. These techniques are being used for increasing the memory testability and for lowering the cost of test equipment. Semiconductor memories are an essential component of digital computers - they are used as primary storage devices. They are used in almost all home electronic equipment, in hospitals and for avionics and space applications. From hand-held electronic calculators to supercomputers, we have seen generations of memories that have progressively become smaller, smarter and cheaper. Since the mid-1970s there has been vigorous research in semiconductor memory design and testing. Such research has resulted in bringing the dynamic RAM (DRAM) to the forefront of the microelectronics industry in terms of achievable integration levels, high performance, high reliability, low power and low cost. The DRAM is regarded as the technological driver for the commercial microelectronics industry. Full Product DetailsAuthor: Pinaki Mazumder , Kanad ChakrabortyPublisher: Kluwer Academic Publishers Imprint: Kluwer Academic Publishers Edition: 1996 ed. Volume: v. 6 Dimensions: Width: 15.60cm , Height: 2.30cm , Length: 23.40cm Weight: 1.710kg ISBN: 9780792397823ISBN 10: 0792397827 Pages: 424 Publication Date: 30 September 1996 Audience: College/higher education , Professional and scholarly , Undergraduate , Postgraduate, Research & Scholarly Format: Hardback Publisher's Status: Unknown Availability: In Print  Limited stock is available. It will be ordered for you and shipped pending supplier's limited stock. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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