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OverviewBy shrinking feature sizes, deep-submicron technology is enabling the design of systems with increased complexity on a single chip, but it is also introducing a productivity design gap. Additionally, system designers have to cope with an ever-increasing application complexity and shrinking time-to-market windows. Design re-use and system-level co-synthesis are two approaches that are being employed to bridge the design gap and to aid system designers. Power consumption has become one of the main barriers in embedded computing systems design and therefore, methodologies and techniques that provide power-aware hardware/software co-design are necessary. System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone. System-Level Design Techniques for Energy-Efficient Embedded Systems will be of interest to advanced undergraduates, graduate students, and designers, whom are interested in energy-efficient embedded systems design. Full Product DetailsAuthor: Marcus T. Schmitz , Bashir M. Al-Hashimi , Petru ElesPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2004 ed. Dimensions: Width: 15.50cm , Height: 1.40cm , Length: 23.50cm Weight: 1.080kg ISBN: 9781402077500ISBN 10: 1402077505 Pages: 194 Publication Date: 31 December 2003 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsBackground.- Power Variation-Driven Dynamic Voltage Scaling.- Optimisation of Mapping and Scheduling for Dynamic Voltage Scaling.- Energy-Efficient Multi-mode Embedded Systems.- Dynamic Voltage Scaling for Control Flow-Intensive Applications.- LOPOCOS: A Prototype Low Power Co-Synthesis Tool.- Conclusion.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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