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OverviewOnly two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation. Full Product DetailsAuthor: Vasant B. Rao , David V. Overhauser , Timothy N. Trick , Ibrahim N. HajjPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: Softcover reprint of the original 1st ed. 1989 Volume: 66 Dimensions: Width: 15.50cm , Height: 1.20cm , Length: 23.50cm Weight: 0.349kg ISBN: 9781461289630ISBN 10: 1461289637 Pages: 210 Publication Date: 05 October 2011 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of Contents1. Introduction.- 2. Overview of Simulation Techniques.- 2.1 Analog vs Digital Simulation.- 2.2 Gate-Level Simulation.- 2.3 Switch-Level Logic Simulation.- 2.4 Mixed-Mode or Hybrid Simulation.- 2.5 Switch-Level Timing Simulation.- 3. Mos Network Partitioning and Ordering.- 3.1 MOS Network Components and Models.- 3.2 Partitioning the MOS Network into Blocks.- 3.3* Partitioning into Driver and Pass Transistors.- 3.4 Ordering of Partitioned Blocks.- 3.5 Conclusions.- 4. Switch-Level Timing Simulation.- 4.1 Overview.- 4.2 Waveform Representation.- 4.3 Simulation Algorithm.- 4.4 Deriving Inverter Voltage Equations.- 4.5 Determining the dc Output Voltage.- 4.6 Mapping Complex Blocks to Primitives.- 4.7 Parasitics.- 4.8 Sample Subcircuit Processing.- 5. Simulating Strongly Connected Components.- 5.1 Waveform Relaxation vs Time-point Relaxation.- 5.2 Dynamic Windowing.- 6. Performance of Idsim2.- References.- About The Authors.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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