Overview

This book is the second volume of a two-volume book set which introduces software-defined chips. In this book, the programming model of the software-defined chips is analyzed by tracing the coevolution of modern general-purpose processors and programming models. The enhancement in hardware security and reliability of the software-defined chips are described from the perspective of dynamic and partial reconfiguration. The challenges and prospective trends of software-defined chips are also discussed. Current applications in the fields of artificial intelligence, cryptography, 5G communications, etc., are presented in detail. Potential applications in the future, including post-quantum cryptography, evolutionary computing, etc., are also discussed. This book is suitable for scientists and researchers in the areas of electrical and electronic engineering and computer science. Postgraduate students, practitioners and professionals in related areas are also potentially interested inthe topic of this book.

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Leibo Liu received B.S. and Ph.D. from Tsinghua University in 1999 and 2004, respectively. He is a tenured professor of the School of Integrated Circuits at Tsinghua University. His research interests include  reconfigurable computing, hardware security and cryptographic engines. He has been the principle investigator of more than 20 major national and international research programs. He has published five books and over 300 peer-reviewed papers and has been granted over 80 patents. The total citation of his publication is 3729, and his H-index is 29. He serves as the deputy editor-in-chief of IEEE Circuits and System Magazine and executive associate editor-in-chief of Frontiers of Information Technology & Electronic Engineering. He has also served on the technical and organization committees of international conferences including Design Automation Conference, IEEE Asian Solid-State Circuit Conference, etc. He is the recipient of several national awards including the Second Prize National Award for Technological Invention, Chinese Patent Golden Award, etc. His research has been awarded 15 of the world’s leading scientific and technological achievements at the fifth World Internet Conference. Key technologies have been applied to information security chips, programmable devices, wearable computer products, and CPU systems. Since 2009, Intel has made tremendous investment into the collaborative research and development with his team in Tsinghua University. The collaboration leads to the success of the first ultra-small wearable computer (“Edison”) in the world released in 2014 and the launch of a server CPU in 2018, which is the first commercial CPU product with all hardware behaviors under comprehensive surveillance at runtime. These research results have brought considerable economic as well as social benefits. Shaojun Wei (Fellow, IEEE) received the Ph.D. degree from the La Faculté Polytechnique de Mons, Mons, Belgium, in 1991. He is a professorat the School of Integrated Circuits, Tsinghua University, Beijing, China. His main research interests include reconfigurable computing VLSI system-on-chip (SoC) design, electronic design automation (EDA) methodology and application-specific integrated circuit (ASIC) design for communications. Jianfeng Zhu received the B.S. and Ph.D. degrees in electronic science and technology from Tsinghua University, Beijing, China, in 2008 and 2015, respectively. He is currently with School of Integrated Circuits, Tsinghua University. His current research interests include software-defined chips, the architecture and compilation of CGRA, hardware security and low-power design. Chenchen Deng received the B.S. in Electronic Engineering from Beijing University of Posts and Telecommunications, China, in 2007 and the D.Phil. in Engineering Science from University of Oxford, UK, in 2012. She now works as an assistant research fellow at Beijing National Research Center for Information Science and Technology, Tsinghua University, Beijing. Her current research interests include software-defined chips, reconfigurable computing, energy-efficient computing systems and design methods for hardware security.

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