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OverviewComputer-aided design (CAD) of very large scale integrated (VLSI) circuits is concerned with the development of computer programs for the automated design and manufacture of ICs. Automated VLSI design is referred to as VLSI synthesis. Synthesis of VLSI circuits involves transforming a specification of circuit behavior into a mask-level layout which can be fabricated using VLSI manufacturing processes. Optimization strategies are vital in VLSI synthesis in order to meet desired specifications. However, the optimization problems encountered in VLSI synthesis are typically nondeterministic polynomial-time (NP)-complete or NP-hard. Therefore, solutions to the optimization problems incorporate heuristic strategies, the development of which requires a thorough understanding of the problem at hand. Thus, optimization-based VLSI synthesis has evolved into a rich and exciting area of research. Automata theory forms a cornerstone of digital VLSI system design. Sequential Logic Synthesis deals exclusively with finite automata theory and practice. The extensive use of finite state automata, finite state machines (FSMs) or simple sequential logic in VLSI circuits and the recent proliferation of CAD research in the area of FSM synthesis has prompted the writing of this book. Full Product DetailsAuthor: Pranav Ashar , S. Devadas , A. Richard NewtonPublisher: Springer Imprint: Springer Edition: 1992 ed. Volume: 162 Dimensions: Width: 15.50cm , Height: 1.50cm , Length: 23.50cm Weight: 1.180kg ISBN: 9780792391876ISBN 10: 079239187 Pages: 225 Publication Date: 30 November 1991 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsAcknowledgments.- 1 Introduction.- 1.1 Computer-Aided VLSI Design.- 1.2 The Synthesis Pipeline.- 1.3 Sequential Logic Synthesis.- 1.4 Early Work in Sequential Logic Synthesis.- 1.5 Recent Developments.- 1.6 Organization of the Book.- 2 Basic Definitions and Concepts.- 2.1 Two-Valued Logic.- 2.2 Multiple-Valued Logic.- 2.3 Multilevel Logic.- 2.4 Multiple-Valued Input, Multilevel Logic.- 2.5 Finite Automata.- 3 Encoding of Symbolic Inputs.- 3.1 Introduction.- 3.2 Input Encoding Targeting Two-Level Logic.- 3.3 Satisfying Encoding Constraints.- 3.4 Input Encoding Targeting Multilevel Logic.- 3.5 Conclusion.- 4 Encoding of Symbolic Outputs.- 4.1 Heuristic Output Encoding Targeting Two-Level Logic.- 4.2 Exact Output Encoding Targeting Two-Level Logic.- 4.3 Symbolic Output Don’t Cares.- 4.4 Output Encoding for Multilevel Logic.- 4.5Conclusion.- 5 State Encoding.- 5.1 Heuristic State Encoding Targeting Two-Level Logic.- 5.2 Exact State Encoding for Two-Level Logic.- 5.3 Symbolic Next State Don’t Cares.- 5.4 State Encoding for Multilevel Logic.- 5.5 Conclusion.- 6 Finite State Machine Decomposition.- 6.1 Introduction.- 6.2 Definitions for Decomposition.- 6.3 Preserved Covers and Partitions.- 6.4 General Decomposition Using Factors.- 6.5 Exact Decomposition Procedure for a Two-Way General Topology.- 6.6 Targeting Arbitrary Topologies.- 6.8 Relationship to State Assignment.- 6.9 Experimental Results.- 6.10 Conclusion.- 7 Sequential Don’t Cares.- 7.1 Introduction.- 7.2 State Minimization.- 7.3 Input Don’t Care Sequences.- 7.4 Output Don’t Cares to Minimize States.- 7.5 Single Machine Optimization at the Logic Level.- 7.6 Interconnected Machine Optimization at the Logic Level.- 7.7 Conclusion.- 8 Conclusions and Directions for Future Work.- 8.1 Alternate Representations.- 8.2 Optimization at the Logic Level.- 8.3 Don’t Cares and Testability.- 8.4 Exploiting Register-Transfer Level Information.- 8.5 Sequential Logic Synthesis Systems.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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