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OverviewThis book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since process variability is an ongoing challenge in large memory arrays, this book highlights the most popular SRAM bitcell topologies (benchmark circuits) that mitigate variability, along with exhaustive analysis. Experimental simulation setups are also included, which cover nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis. Emphasis is placed throughout the book on the various trade-offs for achieving a best SRAM bitcell design. Provides a complete and concise introduction to SRAM bitcell design and analysis; Offers techniques to face nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis; Includes simulation set-ups for extracting different design metrics for CMOS technology and emerging devices; Emphasizes different trade-offs for achieving the best possible SRAM bitcell design. Full Product DetailsAuthor: Jawar Singh , Saraju P. Mohanty , Dhiraj K. PradhanPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2012 Dimensions: Width: 15.50cm , Height: 1.10cm , Length: 23.50cm Weight: 0.454kg ISBN: 9781461408178ISBN 10: 1461408172 Pages: 168 Publication Date: 31 July 2012 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsIntroduction to SRAM.- Design Metrics of SRAM Bitcell.- Single-ended SRAM Bitcell Design.- 2-Port SRAM Bitcell Design.- SRAM Bitcell Design Using Unidirectional Devices.- NBTI and its Effect on SRAM.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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