Reconfigurable Obfuscation Techniques for the IC Supply Chain: Using FPGA-like Schemes for Protection of Intellectual Property

Author:   Zain Ul Abideen ,  Samuel Pagliarini
Publisher:   Springer International Publishing AG
ISBN:  

9783031775086


Pages:   200
Publication Date:   26 December 2024
Format:   Hardback
Availability:   Not yet available   Availability explained
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Reconfigurable Obfuscation Techniques for the IC Supply Chain: Using FPGA-like Schemes for Protection of Intellectual Property


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Overview

This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.   

Full Product Details

Author:   Zain Ul Abideen ,  Samuel Pagliarini
Publisher:   Springer International Publishing AG
Imprint:   Springer International Publishing AG
ISBN:  

9783031775086


ISBN 10:   3031775082
Pages:   200
Publication Date:   26 December 2024
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Forthcoming
Availability:   Not yet available   Availability explained
This item is yet to be released. You can pre-order this item and we will dispatch it to you upon its release.

Table of Contents

Introduction.- Background.- A Security-aware CAD Flow for the Obfuscation Method.- Physical Implementation.- Security Analysis.- Securing the Bitstream of hASIC.

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Author Information

Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech), Tallinn, Estonia, and his M.S. degree in computer engineering (Master in Integration, Security and Trust in Embedded systems) from Grenoble Institute of Technology, Grenoble, France. He is currently a postdoctoral researcher at Carnegie Mellon University, Pittsburgh, PA, USA. His research primarily focuses on ASIC design, hardware security, PUFs, TRNGs, reliable hardware designs, and post-quantum cryptography. Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA.

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