|
|
|||
|
||||
OverviewPower Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion of techniques and methodologies for improving the power efficiency of CMOS circuits (digital and analog), systems on chip, microelectronic systems, wirelessly networked systems of computational nodes and so on. In addition to providing an in-depth analysis of the sources of power dissipation in VLSI circuits and systems and the technology and design trends, this book provides a myriad of state-of-the-art approaches to power optimization and control. The different chapters of Power Aware Design Methodologies have been written by leading researchers and experts in their respective areas. Contributions are from both academia and industry. The contributors have reported the various technologies, methodologies, and techniques in such a way that they are understandable and useful. Full Product DetailsAuthor: Massoud Pedram , Jan M. RabaeyPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2002 ed. Dimensions: Width: 15.60cm , Height: 3.00cm , Length: 23.40cm Weight: 2.080kg ISBN: 9781402071522ISBN 10: 1402071523 Pages: 522 Publication Date: 30 June 2002 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsCMOS Device Technology Trends for Power-Constrained Applications.- Low Power Memory Design.- Low-Power Digital Circuit Design.- Low Voltage Analog Design.- Low Power Flip-Flop and Clock Network Design Methodologies in High-Performance System-on-a-Chip.- Power Optimization by Datapath Width Adjustment.- Energy-Efficient Design of High-Speed Links.- System and Microarchitectural Level Power Modeling, Optimization, and Their Implications in Energy Aware Computing.- Tools and Techniques for Integrated Hardware-Software Energy Optimizations.- Power-Aware Communication Systems.- Power-Aware Wireless Microsensor Networks.- Circuit and System Level Power Management.- Tools and Methodologies for Power Sensitive Design.- Reconfigurable Processors — The Road to Flexible Power-Aware Computing.- Energy-Efficient System-Level Design.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |