Free Delivery Over $100
|
|
|||
|
||||
OverviewEmbedded systems are characterized by the presence of processors running application-specific software. Recent years have seen a large growth of such systems, and this trend is projected to continue with the growth of systems on a chip. Many of these systems have strict performance and cost requirements. To design these systems, sophisticated timing analysis tools are needed to accurately determine the extreme case (best case and worst case) performance of the software components. Existing techniques for this analysis have one or more of the following limitations: they cannot model complicated programs; they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines; and they cannot be easily retargeted for new hardware platforms. In this text, a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modelling. It should be of interest to Design Automation professionals as well as designers of circuits and systems. Full Product DetailsAuthor: Yau-Tsun Steven Li , Sharad MalikPublisher: Springer Imprint: Springer Edition: 1999 ed. Dimensions: Width: 15.50cm , Height: 1.10cm , Length: 23.50cm Weight: 0.920kg ISBN: 9780792383826ISBN 10: 0792383826 Pages: 146 Publication Date: 30 November 1998 Audience: College/higher education , Undergraduate , Postgraduate, Research & Scholarly Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of Contents1. Introduction.- 1.1 The Emergence of Embedded Systems.- 1.2 Performance Constraints of Embedded Systems.- 1.3 Challenges in Designing Embedded Systems.- 1.4 Research Goals.- 1.5 Summary.- 1.6 Organization of this Book.- 2. Related Work in Timing Analysis for Embedded Software.- 2.1 Introduction.- 2.2 Program Path Analysis.- 2.3 Microarchitecture Modeling.- 2.4 Retargetability Issues.- 2.5 Summary.- 3. Program Path Analysis.- 3.1 Introduction.- 3.2 Problems with Program Path Analysis.- 3.3 Execution Count Analysis.- 3.4 Program Control Flow and Logical Flow.- 3.5 Integer Linear Programming Formulation.- 3.6 Solving ILP Problems.- 3.7 Experimental Validation.- 3.8 Chapter Conclusions.- 4. Microarchitecture Modeling.- 4.1 Introduction.- 4.2 Simple Microarchitectures.- 4.3 Advanced Microarchitectures and Memory Systems.- 4.4 Cache Modeling.- 4.5 Instruction Cache Modeling.- 4.6 Direct Mapped Instruction Cache Analysis.- 4.7 Set Associative Instruction Cache Analysis.- 4.8 Interprocedural Calls.- 4.9 Data Cache Modeling.- 4.10 Pipeline Modeling.- 4.11 Experiments.- 4.12 Chapter Conclusions.- 5. A Retargetable Timing Analysis Tool — Cinderella.- 5.1 Introduction.- 5.2 Issues in Timing Analysis.- 5.3 Classification of Retargeting Information.- 5.4 Implementation of Retargetable Modules.- 5.5 Operations.- 5.6 Chapter Conclusions.- 6. Conclusions.- 6.1 Contributions.- 6.2 Future Research Directions.- Appendices.- A — Practical Complexity of the ILP Problems.- References.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
||||
