Free Delivery Over $100
|
|
|||
|
||||
Awards
OverviewOver the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. On-Chip Communication Architecures is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. Full Product DetailsAuthor: Sudeep Pasricha , Nikil Dutt (Donald Bren School of Information and Computer Science, Irvine)Publisher: Elsevier Science & Technology Imprint: Morgan Kaufmann Publishers In Dimensions: Width: 19.10cm , Height: 3.50cm , Length: 23.50cm Weight: 1.070kg ISBN: 9780123738929ISBN 10: 012373892 Pages: 544 Publication Date: 12 June 2008 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsAn Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design TrendsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
||||
