Offset Reduction Techniques in High-Speed Analog-to-Digital Converters: Analysis, Design and Tradeoffs

Author:   Pedro M. Figueiredo ,  João C. Vital
Publisher:   Springer
Edition:   Softcover reprint of hardcover 1st ed. 2009
ISBN:  

9789048181926


Pages:   382
Publication Date:   28 October 2010
Format:   Paperback
Availability:   In Print   Availability explained
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Offset Reduction Techniques in High-Speed Analog-to-Digital Converters: Analysis, Design and Tradeoffs


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Overview

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Full Product Details

Author:   Pedro M. Figueiredo ,  João C. Vital
Publisher:   Springer
Imprint:   Springer
Edition:   Softcover reprint of hardcover 1st ed. 2009
Dimensions:   Width: 15.50cm , Height: 2.10cm , Length: 23.50cm
Weight:   0.617kg
ISBN:  

9789048181926


ISBN 10:   9048181925
Pages:   382
Publication Date:   28 October 2010
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Table of Contents

Preface. List of Symbols and Abbreviations. 1 High-Speed ADC Architectures. 2 Averaging Technique - DC Analysis and Termination. 3 Averaging Technique - Transient Analysis and Automated Design. 4 Integrated Prototypes Using Averaging. 5 Offset Cancellation Methods. 6 Conclusions. Appendix A: Averaging With Piecewise Linear Differential Pairs. Appendix B: Mismatches In The Resistors Of The Aveaging Network. Appendix C Averaging In Folding Stages. References. Index.

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Author Information

Pedro Figueiredo received the degrees of Licenciado and Doutor (PhD) in Electrical and Computer Engineering in 1999 and 2006, respectively, from the Instituto Superior Tecnico (IST), Lisbon, Portugal. From 1997 to 1999, he was with the Analog and Mixed-Mode Circuits Group in the Institute for Systems and Computer Engineering (INESC), Lisbon, Portugal, where he worked on low-noise logic families and high-speed Analog-to-Digital Converters. In 1999, he joined Chipidea - Microelectronica, where he currently leads the group responsible for the design of Analog-to-Digital Converters. His main research interests are in the area of analog and mixed-signal circuits, with emphasis on high-speed data conversion and design automation. He has 10 publications in international journals and conferences. Joao Vital received the degrees of Licenciado, Mestre and Doutor (PhD) in Electrical and Computer Engineering in 1986, 1990 and 1994, respectively, all from the Instituto Superior Tecnico (IST), Lisboa, Portugal. He is a Co-founder of Chipidea - Microelectronica in 1997, and currently serves as Vice-President of Data Conversion, leading the Data Conversion Solutions Division of Chipidea to provide competitive solutions towards the demanding markets of Broadband Wireless Communications and Video. His main scientific interests are in the area of analog and mixed-signal integrated-circuit design, with a focus on data conversion. He developed research work in the University of Pavia, Italy, in the University of California - Los Angeles, USA, and in the Oregon State University, USA, also in 1990. He has over 50 publications in international journals, book chapters and conferences and is a co-holder of an European and US Patent filed by British Telecom.

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