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OverviewOffset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed. Full Product DetailsAuthor: Pedro M Figueiredo , Jo O C VitalPublisher: Springer Imprint: Springer Dimensions: Width: 23.40cm , Height: 2.10cm , Length: 15.60cm Weight: 0.562kg ISBN: 9781402098000ISBN 10: 1402098006 Pages: 404 Publication Date: 16 March 2009 Audience: General/trade , General Format: Undefined Publisher's Status: Unknown Availability: Out of stock  Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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