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OverviewPower consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic. Full Product DetailsAuthor: Nikhil Jayakumar , Suganth Paul , Rajesh Garg , Kanupriya GulatiPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2010 ed. Dimensions: Width: 15.50cm , Height: 1.40cm , Length: 23.50cm Weight: 1.150kg ISBN: 9781441909497ISBN 10: 1441909494 Pages: 214 Publication Date: 03 December 2009 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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