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OverviewLow-Voltage CMOS Operational Amplifiers: Theory, Design and Implementation discusses both single and two-stage architectures. Opamps with constant-gm input stage are designed and their excellent performance over the rail-to-rail input common mode range is demonstrated. The first set of CMOS constant-gm input stages was introduced by a group from Technische Universiteit, Delft and Universiteit Twente, the Netherlands. These earlier versions of circuits are discussed, along with new circuits developed at the Ohio State University. The design, fabrication (MOSIS Tiny Chips), and characterization of the new circuits are now complete. Basic analog integrated circuit design concepts should be understood in order to fully appreciate the work presented. However, the topics are presented in a logical order and the circuits are explained in great detail, so that Low-Voltage CMOS Operational Amplifiers can be read and enjoyed by those without much experience in analog circuit design. It is an invaluable reference book, and may be used as a text for advanced courses on the subject. Full Product DetailsAuthor: Satoshi Sakurai , Mohammed IsmailPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: Softcover reprint of the original 1st ed. 1995 Volume: 290 Dimensions: Width: 15.50cm , Height: 1.50cm , Length: 23.50cm Weight: 0.427kg ISBN: 9781461359562ISBN 10: 1461359562 Pages: 254 Publication Date: 22 December 2012 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand We will order this item for you from a manufactured on demand supplier. Table of Contents1 Introduction.- 2 Operational Amplifiers in 3-V Supply.- 3 Constant-gm Input Stages, Kn ? Kp.- 4 Robust Bias Circuit Techniques.- 5 Constant-gm Input Stages, Kn ? Kp.- 6 Rail-to-Rail Output Stages.- 7 Single-Stage Operational Amplifiers.- 8 Two-Stage Operational Amplifiers.- 9 Silicon Implementations.- 10 Conclusion and Future Work.- A MOSIS 2pon P-well Process Parameters.- A.1 BSIM Parameters for N35S.- A.2 LEVEL 2 Parameters for N35S.- A.3 BSIM Parameters for N3CM.- A.4 LEVEL 2 Parameters for N3CM.- B Circuit Netlists Used For Simulation.- B.1 An N-Channel Differential Pair.- B.2 A CMOS Source Follower.- B.3 A CMOS Rail-to-Rail Differential Pair.- B.4 A Simple Operational Amplifier Model.- B.5 A Simple Rail-to-Rail Operational Amplifier With an IdealGain Stage.- B.7 Monitor Circuit 1.- B.8 Monitor Circuit 2.- B.10 Constant-gm Input Stage 1.- B.11 Constant-g1 Input Stage 2.- B.12 Small Signal Model of the Modified Output Stage.- B.13 Modified Class AB Controlled Output Stage.- B.14 Opamp 1.- B.15 Opamp la.- B.16 Opamp lb.- B.17 Opamp 2.- B.18 Opamp 2a.- B.19 Opamp 2b.- B.20 Opamp 3a.- B.21 Opamp 3B.- C Measurement Techniques.- C.1 Input Stage Transconductance Measurements.- C.2 Low Frequency Operational Amplifier Gain Measurements.- C.3 Unity Gain Frequency and Phase Margin Measurements..ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |