Low Power Vlsi Design And Technology

Author:   Farid N Najm (Univ Of Toronto, Canada) ,  Garey K-h Yeap (Motorola Inc, Usa)
Publisher:   World Scientific Publishing Co Pte Ltd
Volume:   6
ISBN:  

9789810225186


Pages:   128
Publication Date:   01 August 1996
Format:   Hardback
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

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Low Power Vlsi Design And Technology


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Overview

This book is a collection of pioneering applied research papers in low power VLSI design and technology. A comprehensive introductory chapter presents the current status of the industry and academic research in the area of low power VLSI design and technology. Other topics cover logic synthesis, floor-planning, circuit design and analysis, from the perspective of low power requirements. The readers will have a sampling of some key problems in this area as the low power solutions span the entire spectrum of the design process. The book also provides references on up-to-date research and development issues with practical solution techniques.

Full Product Details

Author:   Farid N Najm (Univ Of Toronto, Canada) ,  Garey K-h Yeap (Motorola Inc, Usa)
Publisher:   World Scientific Publishing Co Pte Ltd
Imprint:   World Scientific Publishing Co Pte Ltd
Volume:   6
ISBN:  

9789810225186


ISBN 10:   9810225180
Pages:   128
Publication Date:   01 August 1996
Audience:   Professional and scholarly ,  General/trade ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Table of Contents

Introduction to low-power VLSI design, G. Yeap and A. Wild; low power design of off-chip drivers and transmission lines - a branch and bound approach, R. Gupta et al; a new CMOS driver model for transient analysis and power dissipation analysis, H. Liao et al; on the optimal drivers of high-speed low power ICs, D. Zhou and X.Y. Liu; floorplan design with low power considerations, K.Y. Chao and D.F. Wong; retiming sequential circuits for low power, J. Monteiro et al.

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