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OverviewFull Product DetailsAuthor: Kaushik Roy (Purdue University) , Sharat Prasad (Cisco)Publisher: John Wiley & Sons Inc Imprint: Wiley-Interscience Dimensions: Width: 16.40cm , Height: 2.20cm , Length: 24.70cm Weight: 0.642kg ISBN: 9780471114888ISBN 10: 047111488 Pages: 376 Publication Date: 14 March 2000 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Out of stock The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available. Table of ContentsLow-Power CMOS VLSI Design. Physics of Power Dissipation in CMOS FET Devices. Power Estimation. Synthesis for Low Power. Design and Test of Low-Voltage CMOS Circuits. Low-Power Static Ram Architectures. Low-Energy Computing Using Energy Recovery Techniques. Software Design for Low Power. Index.ReviewsThis is a highly recommended book for all academic engineering libraries. (E-Streams, Vol. 4, No. 8, August 2001) Author InformationKAUSHIK ROY is a professor in the School of Electrical and ComputerEngineering at Purdue University, West Lafayette, Indiana. SHARAT C. PRASAD is a system architecture (hardware) engineer withCisco Systems. Tab Content 6Author Website:Countries AvailableAll regions |