Logic Synthesis and Verification Algorithms

Author:   Gary D Hachtel
Publisher:   Springer
ISBN:  

9781280200809


Pages:   564
Publication Date:   01 January 1996
Format:   Undefined
Availability:   In stock   Availability explained
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Logic Synthesis and Verification Algorithms


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Overview

This textbook is designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students.; This book is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics.; A unique feature of this text is the large collection of solved problems.; Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.

Full Product Details

Author:   Gary D Hachtel
Publisher:   Springer
Imprint:   Springer
ISBN:  

9781280200809


ISBN 10:   1280200804
Pages:   564
Publication Date:   01 January 1996
Audience:   General/trade ,  General
Format:   Undefined
Publisher's Status:   Active
Availability:   In stock   Availability explained
We have confirmation that this item is in stock with the supplier. It will be ordered in for you and dispatched immediately.

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