Logic Synthesis and Verification Algorithms

Author:   Gary D. Hachtel ,  Fabio Somenzi
Publisher:   Springer-Verlag New York Inc.
Edition:   1996 ed.
ISBN:  

9780387310046


Pages:   564
Publication Date:   10 February 2006
Format:   Paperback
Availability:   In Print   Availability explained
Limited stock is available. It will be ordered for you and shipped pending supplier's limited stock.

Our Price $211.07 Quantity:  
Add to Cart

Share |

Logic Synthesis and Verification Algorithms


Add your own review!

Overview

This book blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization. Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.

Full Product Details

Author:   Gary D. Hachtel ,  Fabio Somenzi
Publisher:   Springer-Verlag New York Inc.
Imprint:   Springer-Verlag New York Inc.
Edition:   1996 ed.
Dimensions:   Width: 15.50cm , Height: 3.00cm , Length: 23.50cm
Weight:   1.830kg
ISBN:  

9780387310046


ISBN 10:   0387310045
Pages:   564
Publication Date:   10 February 2006
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Out of Print
Availability:   In Print   Availability explained
Limited stock is available. It will be ordered for you and shipped pending supplier's limited stock.

Table of Contents

I: Introduction.1. Introduction.2. A Quick Tour of Logic Synthesis with the Help of a Simple Example.- II: Two Level Logic Synthesis. 3. Boolean Algebras. 4. Synthesis of Two-Level Circuits. 5. Heuristic Minimization of Two-Level Circuits. 6. Binary Decision Diagrams (BDDs).- III: Models of Sequential Systems. 7. Models of Sequential Systems. 8. Synthesis and Verification of Finite State Machines. 9. Finite Automata. IV: Multilevel Logic Synthesis. 10. Multi-Level Logic Synthesis. 11. Multi-Level Minimization. 12. Automatic Test Generation for Combinational Circuits. 13. Technology Mapping. A. ASCII Codes. B. Supplementary Problems.- Bibliography.- Index.

Reviews

Author Information

Tab Content 6

Author Website:  

Customer Reviews

Recent Reviews

No review item found!

Add your own review!

Countries Available

All regions
Latest Reading Guide

lgn

al

Shopping Cart
Your cart is empty
Shopping cart
Mailing List