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OverviewFull Product DetailsAuthor: Vyas Krishnan , Srinivas KatkooriPublisher: Springer Imprint: Springer Edition: 1st ed. 2026 ISBN: 9789400718920ISBN 10: 9400718926 Pages: 250 Publication Date: 01 January 2015 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Not yet available This item is yet to be released. You can pre-order this item and we will dispatch it to you upon its release. Table of ContentsMinimizing interconnect delays through net-topology aware high-level synthesis.- Layout-aware high-level synthesis for three-dimensional integrated circuits.- Crosstalk- aware high-level synthesis for macrocell based designs.- Temperature-aware unified physical-level and high-level synthesis.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |