Integrated System-Level Modeling of Network-On-Chip Enabled Multi-Processor Platforms

Author:   Tim Kogel ,  Rainer Leupers ,  Heinrich Meyr
Publisher:   Springer
ISBN:  

9789048108800


Pages:   216
Publication Date:   05 September 2008
Format:   Undefined
Availability:   Out of stock   Availability explained


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Integrated System-Level Modeling of Network-On-Chip Enabled Multi-Processor Platforms


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Overview

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

Full Product Details

Author:   Tim Kogel ,  Rainer Leupers ,  Heinrich Meyr
Publisher:   Springer
Imprint:   Springer
Dimensions:   Width: 23.40cm , Height: 1.20cm , Length: 15.60cm
Weight:   0.308kg
ISBN:  

9789048108800


ISBN 10:   9048108802
Pages:   216
Publication Date:   05 September 2008
Audience:   General/trade ,  General
Format:   Undefined
Publisher's Status:   Unknown
Availability:   Out of stock   Availability explained

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<p>From the reviews: <p><p> The book covers most of the major areas of system-level design and modeling, and much of the work described has been incorporated into a commercial ESL tool . This book s scope and range of pragmatic ideas make it valuable for a wide audience. When combined with the extensive list of references (260!), this is a very valuable resource for anyone interested in the area . It should resonate with students, researchers, and practical designers . (Grant Martin, IEEE Design and Test of Computers, May-June, 2007)


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