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OverviewThe memory system has the potential to be a hub for future innovation. While conventional memory systems focused primarily on high density, other memory system metrics like energy, security, and reliability are grabbing modern research headlines. With processor performance stagnating, it is also time to consider new programming models that move some application computations into the memory system. This, in turn, will lead to feature-rich memory systems with new interfaces. The past decade has seen a number of memory system innovations that point to this future where the memory system will be much more than dense rows of unintelligent bits. This book takes a tour through recent and prominent research works, touching upon new DRAM chip designs and technologies, near data processing approaches, new memory channel architectures, techniques to tolerate the overheads of refresh and fault tolerance, security attacks and mitigations, and memory scheduling. Full Product DetailsAuthor: Rajeev BalasubramonianPublisher: Springer International Publishing AG Imprint: Springer International Publishing AG Weight: 0.300kg ISBN: 9783031006357ISBN 10: 3031006356 Pages: 129 Publication Date: 10 September 2019 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Language: English Table of ContentsList of Figures.- List of Tables.- Preface.- Acknowledgments.- Introduction.- Memory System Basics for Every Architect.- Commercial Memory Products.- Memory Scheduling.- Data Placement.- Memory Chip Microarchitectures.- Memory Channels.- Memory Reliability.- Memory Refresh.- Near Data Processing.- Memory Security.- Closing Thoughts.- Bibliography.- Author's Biography.ReviewsAuthor InformationRajeev Balasubramonian is a Professor at the School of Computing, University of Utah. He received his B.Tech. in Computer Science and Engineering from the Indian Institute of Technology, Bombay in 1998. He received his M.S. (2000)and Ph.D. (2003) from the University of Rochester. His primary research interests include memory systems, security, and application-specific architectures. Prof. Balasubramonian is a recipient of an NSF CAREER award, faculty research awards from IBM, Google, HPE, an Intel Outstanding Research Award, and various teaching awards at the University of Utah. He has co-authored papers that have been selected as IEEE Micro Top Picks (2007 and 2010) and that have received three best paper awards. Tab Content 6Author Website:Countries AvailableAll regions |
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