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OverviewThe simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore’s Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril. Full Product DetailsAuthor: David Robert Stauffer , Jeanne Trinko Mechler , Michael A. Sorna , Kent DramstadPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: Softcover reprint of hardcover 1st ed. 2009 Dimensions: Width: 15.50cm , Height: 2.50cm , Length: 23.50cm Weight: 0.759kg ISBN: 9781441946416ISBN 10: 1441946411 Pages: 490 Publication Date: 05 November 2010 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Out of print, replaced by POD We will order this item for you from a manufatured on demand supplier. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |