High Level Synthesis of ASICs under Timing and Synchronization Constraints

Author:   David C. Ku ,  Giovanni DeMicheli
Publisher:   Springer
Edition:   1992 ed.
Volume:   177
ISBN:  

9780792392446


Pages:   294
Publication Date:   31 May 1992
Format:   Hardback
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Our Price $646.80 Quantity:  
Add to Cart

Share |

High Level Synthesis of ASICs under Timing and Synchronization Constraints


Add your own review!

Overview

Computer-aided synthesis of digital circuits from behavioural level specifications offers an effective means to deal with the increasing complexity of digital hardware systems. This book addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioural level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. The text addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of an efficient data-path control-unit is the major contribution of this book. Three requirements are important in modelling ASIC designs: concurrency, external synchronization and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis.

Full Product Details

Author:   David C. Ku ,  Giovanni DeMicheli
Publisher:   Springer
Imprint:   Springer
Edition:   1992 ed.
Volume:   177
Dimensions:   Width: 15.60cm , Height: 1.90cm , Length: 23.40cm
Weight:   1.360kg
ISBN:  

9780792392446


ISBN 10:   0792392442
Pages:   294
Publication Date:   31 May 1992
Audience:   College/higher education ,  Professional and scholarly ,  Postgraduate, Research & Scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Table of Contents

1 Introduction.- 2 System Overview.- 3 Behavioral Transformations.- 4 Sequencing Graph and Resource Model.- 5 Design Space Exploration.- 6 Relative Scheduling.- 7 Resource Conflict Resolution.- 8 Relative Control Generation.- 9 Relative Control Optimization.- 10 System Implementation.- 11 Experimental Results.- 12 Conclusions and Future Work.- References.

Reviews

Author Information

Tab Content 6

Author Website:  

Customer Reviews

Recent Reviews

No review item found!

Add your own review!

Countries Available

All regions
Latest Reading Guide

lgn

al

Shopping Cart
Your cart is empty
Shopping cart
Mailing List