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OverviewComputer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of efficient data-path control-unit is the major contribution of this book. Three requirements are important in modeling ASIC designs: concurrency, external synchronization, and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis. Full Product DetailsAuthor: David C. Ku , Giovanni DeMicheliPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: Softcover reprint of hardcover 1st ed. 1992 Volume: 177 Dimensions: Width: 15.50cm , Height: 1.60cm , Length: 23.50cm Weight: 0.480kg ISBN: 9781441951298ISBN 10: 1441951296 Pages: 294 Publication Date: 19 November 2010 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: Out of stock  The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available. Table of Contents1 Introduction.- 2 System Overview.- 3 Behavioral Transformations.- 4 Sequencing Graph and Resource Model.- 5 Design Space Exploration.- 6 Relative Scheduling.- 7 Resource Conflict Resolution.- 8 Relative Control Generation.- 9 Relative Control Optimization.- 10 System Implementation.- 11 Experimental Results.- 12 Conclusions and Future Work.- References.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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