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OverviewFull Product DetailsAuthor: Bank W. Lee , Bing J. SheuPublisher: Springer Imprint: Springer Edition: 1991 ed. Volume: 127 Dimensions: Width: 15.50cm , Height: 1.50cm , Length: 23.50cm Weight: 1.200kg ISBN: 9780792391326ISBN 10: 0792391322 Pages: 234 Publication Date: 31 December 1990 Audience: College/higher education , Professional and scholarly , Postgraduate, Research & Scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print ![]() This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of Contents1. Introduction.- 1.1 Overview of Neural Architectures.- 1.2 VLSI Neural Network Design Methodology.- 2. VLSI Hopfield Networks.- 2.1 Circuit Dynamics of Hopfield Networks.- 2.2 Existence of Local Minima.- 2.3 Elimination of Local Minima.- 2.4 Neural-Based A/D Converter Without Local Minima.- 2.5 Traveling Salesman Problem.- 3. Hardware Annealing Theory.- 3.1 Simulated Annealing in Software Computation.- 3.2 Hardware Annealing.- 3.3 Application to the Neural-Based A/D Converter.- 4. Programmable Synapses and Gain-Adjustable Neurons.- 4.1 Compact and Programmable Neural Chips.- 4.2 Medium-Term and Long-Term Storage of Synapse Weight.- 5. System Integration for VLSI Neurocomputing.- 5.1 System Module Using Programmable Neural Chip.- 5.2 Application Examples.- 6. Alternative VLSI Neural Chips.- 6.1 Neural Sensory Chips.- 6.2 Various Analog Neural Chips.- 6.3 Various Digital Neural Chips.- 7. Conclusions and Future Work.- Appendixes.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |