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OverviewAssertion-based design is a powerful new paradigm that is facilitating quality improvement in electronic design. Assertions are statements used to describe properties of the design (I.e., design intent), that can be included to actively check correctness throughout the design cycle and even the lifecycle of the product. With the appearance of two new languages, PSL and SVA, assertions have already started to improve verification quality and productivity. This is the first book that presents an “under-the-hood” view of generating assertion checkers, and as such provides a unique and consistent perspective on employing assertions in major areas, such as: specification, verification, debugging, on-line monitoring and design quality improvement. Full Product DetailsAuthor: Marc Boulé , Zeljko ZilicPublisher: Springer Imprint: Springer Edition: Softcover reprint of hardcover 1st ed. 2008 Dimensions: Width: 15.50cm , Height: 1.50cm , Length: 23.50cm Weight: 0.462kg ISBN: 9789048179220ISBN 10: 904817922 Pages: 280 Publication Date: 19 October 2010 Audience: Professional and scholarly , Professional & Vocational Format: Paperback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsAssertions and the Verification Landscape.- Basic Techniques Behind Assertion Checkers.- PSL and SVA Assertion Languages.- Automata for Assertion Checkers.- Construction of PSL Assertion Checkers.- Enhanced Features and Uses of PSL Checkers.- Evaluating and Verifying PSL Assertion Checkers.- Checkers for SystemVerilog Assertions.- Conclusions and Future Work.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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