Overview

This book covers the fundamental knowledge of layout design from the ground up, addressing both physical design, as generally applied to digital circuits, and analog layout. Such knowledge provides the critical awareness and insights a layout designer must possess to convert a structural description produced during circuit design into the physical layout used for IC/PCB fabrication. The book introduces the technological know-how to transform silicon into functional devices, to understand the technology for which a layout is targeted (Chap. 2). Using this core technology knowledge as the foundation, subsequent chapters delve deeper into specific constraints and aspects of physical design, such as interfaces, design rules and libraries (Chap. 3), design flows and models (Chap. 4), design steps (Chap. 5), analog design specifics (Chap. 6), and finally reliability measures (Chap. 7). Besides serving as a textbook for engineering students, this book is a foundational reference for today’s circuit designers.   For Slides and Other Information: https://www.ifte.de/books/pd/index.html

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9783030392864

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Jens Lienig is the director of the Institute of Electromechanical and Electronic Design at Dresden University of Technology, Germany. He received his Ph.D. in the field of computer-aided physical design of multi-chip modules and was employed as a researcher at University of Virginia, Charlottesville and Concordia University, Montreal. Afterwards he worked as project manager at Tanner Research, Inc. and Robert Bosch GmbH.     Juergen Scheible is full Professor for Electronic Design Automation at Reutlingen University. He received his Ph.D. in the field of Electrical Engineering at Karlsruhe Institute of Technology, Germany. From 1992 to 2010, he was with the Automotive Electronics Division, Robert Bosch GmbH, Reutlingen, Germany. There, he was a Senior Engineer in ASIC design, working as Project Manager for the improvement of IC and hybrid design processes and as Director of EDA tool management. He was also the Head of the Department for IC Layout Design.   

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