Overview

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Full Product Details

Author:   Kai-hui Chang ,  Igor L. Markov ,  Valeria Bertacco
Publisher:   Springer
Imprint:   Springer
Edition:   Softcover reprint of hardcover 1st ed. 2009
Volume:   32
Dimensions:   Width: 15.50cm , Height: 1.20cm , Length: 23.50cm
Weight:   0.454kg
ISBN:  

9789048181124

ISBN 10:   9048181127
Pages:   200
Publication Date:   28 October 2010
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   In Print  
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Table of Contents

Background and Prior Art.- Current Landscape in Design and Verification.- Finding Bugs and Repairing Circuits.- FogClear Methodologies and Theoretical Advances in Error Repair.- Circuit Design and Verification Methodologies.- Counterexample-Guided Error-Repair Framework.- Signature-Based Resynthesis Techniques.- Symmetry-Based Rewiring.- FogClear Components.- Bug Trace Minimization.- Functional Error Diagnosis and Correction.- Incremental Verification for Physical Synthesis.- Post-Silicon Debugging and Layout Repair.- Methodologies for Spare-Cell Insertion.- Conclusions.

Reviews

Author Information

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors

Tab Content 6

Author Website:  

Customer Reviews

Recent Reviews

No review item found!

Add your own review!

Countries Available

All regions