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OverviewThis book presents advanced forensic detective control and obfuscation techniques for securing hardware IP cores by exploring beyond conventional technologies. The theme is important to researchers in various areas of specialization, because it encompasses the overlapping topics of EDA-CAD, hardware design security, VLSI design, IP core protection, optimization using evolutionary computing, system-on-chip design and finally application specific processor/hardware accelerator design for consumer electronics applications. The book begins by introducing forensic detective control and obfuscation mechanisms for hardware and IP core security. Further chapters cover hardware stenography, digital signature driven hardware authentication, fault-secured IP cores using digital signature-based watermarks, multi-level watermarking, cryptosystem-based multi-variable fingerprinting, multi-phase and hologram-based obfuscation, and security of functionally obfuscated DSP cores. Full Product DetailsAuthor: Anirban Sengupta (Associate Professor, Indian Institute of Technology (I.I.T) Indore, India)Publisher: Institution of Engineering and Technology Imprint: Institution of Engineering and Technology ISBN: 9781839530319ISBN 10: 1839530316 Pages: 344 Publication Date: 03 January 2020 Audience: College/higher education , Professional and scholarly , Tertiary & Higher Education , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsReviewsAuthor InformationAnirban Sengupta (PhD, FIET, FBCS) is an Associate Professor in Computer Science and Engineering at the Indian Institute of Technology (I.I.T) Indore. He has over 205 publications, 3 Books and 11 Patents and is an IEEE Distinguished Visitor of the IEEE Computer Society as well as an IEEE Distinguished Lecturer at the IEEE Consumer Electronics Society. He is an elected Fellow of the IET and Fellow of the British Computer Society. He is also the Deputy EiC of IET Computers and Digital Techniques and Chair, EiC of the IEEE Computer Society Technical Committee on VLSI as well as holding Editorial positions in more than a dozen IEEE Transactions/Journals/Magazines. He has held many Chair positions in major IEEE flagship conferences and is recipient of several IEEE Honors such as IEEE Editor Awards and Best Paper Awards from Journals/Magazines and Conferences. Tab Content 6Author Website:Countries AvailableAll regions |
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