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OverviewTo surmount the continuous scaling challenges of MOSFET devices, FinFETs have emerged as the real alternative for use as the next generation device for IC fabrication technology. The objective of this book is to provide the basic theory and operating principles of FinFET devices and technology, an overview of FinFET device architecture and manufacturing processes, and detailed formulation of FinFET electrostatic and dynamic device characteristics for IC design and manufacturing. Thus, this book caters to practicing engineers transitioning to FinFET technology and prepares the next generation of device engineers and academic experts on mainstream device technology at the nanometer-nodes. Full Product DetailsAuthor: Samar K. Saha (Santa Clara University, California, USA)Publisher: Taylor & Francis Ltd Imprint: CRC Press Weight: 0.598kg ISBN: 9781138586093ISBN 10: 1138586099 Pages: 318 Publication Date: 16 July 2020 Audience: Professional and scholarly , General/trade , Professional & Vocational , General Format: Hardback Publisher's Status: Active Availability: In Print  This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsChapter 1 Introduction...........................................................................................1 Chapter 2 Fundamentals of Semiconductor Physics............................................25 Chapter 3 Multiple-Gate Metal-Oxide-Semiconductor (MOS) System..............85 Chapter 4 Overview of FinFET Device Technology......................................... 133 Chapter 5 Large Geometry FinFET Device Operation..................................... 151 Chapter 7 Leakage Currents in FinFETs........................................................... 215 Chapter 8 Parasitic Elements in FinFETs.......................................................... 231 Chapter 9 Challenges to FinFET Process and Device Technology .................. 257 Chapter 10 FinFET Compact Models for Circuit Simulation..............................277 Index.......................................................................................................................309ReviewsAuthor InformationSamar K. Saha received a PhD in Physics from Gauhati University, India, and MS in Engineering Management from Stanford University, CA. Currently, he is an Adjunct Professor in the Electrical Engineering Department at Santa Clara University, CA, and Chief Research Scientist at Prospicient Devices, CA. Since 1984, he has worked in various technical and management positions for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta. He has also worked as a faculty member in the Electrical Engineering Departments at Southern Illinois University at Carbondale, IL; Auburn University, AL; the University of Nevada at Las Vegas, NV; and the University of Colorado at Colorado Springs, CO. He has authored more than 100 research papers. He has also authored one book, Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond (CRC Press, 2015); one book chapter on Technology Computer-Aided Design (TCAD), “Introduction to Technology Computer-Aided Design,” in Technology Computer Aided Design: Simulation for VLSI MOSFET (C.K. Sarkar, ed., CRC Press, 2013); and holds 12 US patents. His research interests include nanoscale device and process architecture, TCAD, compact modeling, devices for renewable energy, and TCAD and R&D management. Dr. Saha served as the 2016–2017 President of the Institute of Electrical and Electronics Engineers (IEEE) Electron Devices Society (EDS) and is currently serving as the Senior Past President of EDS, J.J. Ebers Award Committee Chair, and EDS Fellow Evaluation Committee Chair. He is a Fellow of IEEE and a Fellow of the Institution of Engineering and Technology (IET, UK), and a Distinguished Lecturer of IEEE EDS. Previously, he has served as the Junior Past President of EDS; EDS Awards Chair; EDS Fellow Evaluation Committee Member; EDS President- Elect; Vice President of EDS Publications; an elected member of the EDS Board of Governors; Editor-In-Chief of IEEE QuestEDS; Chair of EDS George Smith and Paul Rappaport Awards; Editor of Region 5&6 EDS Newsletter; Chair of EDS Compact Modeling Technical Committee; Chair of EDS North America West Subcommittee for Regions/Chapters; a member of the IEEE Conference Publications Committee; a member of the IEEE TAB Periodicals Committee; and the Treasurer, Vice Chair, and Chair of the Santa Clara Valley-San Francisco EDS chapter. Dr. Saha served as the head guest editor for the IEEE Transactions on Electron Devices (T-ED) Special Issues (SIs) on Advanced Compact Models and 45-nm Modeling Challenges and Compact Interconnect Models for Giga Scale Integration; and as a guest editor for the T-ED SI on Advanced Modeling of Power Devices and their Applications and the IEEE Journal of Electron Devices Society (J-EDS) SI on Flexible Electronics from the Selected Extended Papers at 2018 IFETC. He has also served as a member of the editorial board of the World Journal of Condensed Matter Physics (WJCMP), published by the Scientific Research Publishing (SCIRP). Tab Content 6Author Website:Countries AvailableAll regions |
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