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OverviewThis book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies. Full Product DetailsAuthor: Konstantinos Tatas , Kostas Siozios , Dimitrios Soudris , Axel JantschPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2014 ed. Dimensions: Width: 15.50cm , Height: 2.00cm , Length: 23.50cm Weight: 5.443kg ISBN: 9781461442738ISBN 10: 1461442737 Pages: 265 Publication Date: 08 October 2013 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Manufactured on demand  We will order this item for you from a manufactured on demand supplier. Table of ContentsPart I: Network-on-Chip Design Methodology.- Network-on-Chip Technology: A Paradigm Shift.- NoC Modeling and Topology Exploration.- Communication Architecture.- Power and Thermal Effects and Management.- NoC-based System Integration.- NoC Verification and Testing.- The Spidergon STNoC.- Middleware Memory Management in NoC.- On Designing 3-D Platforms.- The SYSMANTIC NoC Design and Prototyping Framework.- Part II: Suggested Projects.- Projects on Network-on Chip.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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